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00001 #ifndef __GIC_H__ 00002 #define __GIC_H__ 00003 00004 #include "hvmm_types.h" 00005 #include "arch_types.h" 00006 #include "smp.h" 00007 00008 #define GIC_NUM_MAX_IRQS 1024 00009 #define gic_cpumask_current() (1u << smp_processor_id()) 00010 #define GIC_INT_PRIORITY_DEFAULT 0xa0 00011 00012 typedef enum { 00013 GIC_INT_POLARITY_LEVEL = 0, 00014 GIC_INT_POLARITY_EDGE = 1 00015 } gic_int_polarity_t; 00016 00017 typedef void (*gic_irq_handler_t)(int irq, void *regs, void *pdata); 00018 00019 void gic_interrupt(int fiq, void *regs); 00020 hvmm_status_t gic_enable_irq(uint32_t irq); 00021 hvmm_status_t gic_disable_irq(uint32_t irq); 00022 hvmm_status_t gic_init(void); 00023 hvmm_status_t gic_deactivate_irq(uint32_t irq); 00024 volatile uint32_t *gic_vgic_baseaddr(void); 00025 00026 /* 00027 * example: 00028 gic_test_configure_irq( 26, 00029 GIC_INT_POLARITY_LEVEL, 00030 (1u << smp_processor_id()), 00031 GIC_INT_PRIORITY_DEFAULT ); 00032 gic_test_set_irq_handler( 26, &myhandler ); 00033 */ 00034 hvmm_status_t gic_test_configure_irq(uint32_t irq, gic_int_polarity_t polarity, uint8_t cpumask, uint8_t priority); 00035 hvmm_status_t gic_test_set_irq_handler(int irq, gic_irq_handler_t handler, void *pdata ); 00036 00037 #endif