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00001 /* 00002 * monitor_secure.S - Secure mode code for switching to Hyp mode 00003 * 00004 * Copyright (C) 2013 KESL. All rights reserved. 00005 * 00006 */ 00007 00008 .syntax unified 00009 .arch_extension sec 00010 .arch_extension virt 00011 .text 00012 00013 00014 /* ---[Secure Mode]------------------------------------------------------ */ 00015 00016 /* 00017 * Secure Monitor Vector Table 00018 */ 00019 .align 5 00020 monitor_secure_vectors: 00021 .word 0 /* reset */ 00022 b trap_secure_unhandled /* undef*/ 00023 b trap_smc /* smc */ 00024 b trap_secure_unhandled /* pabt*/ 00025 b trap_secure_unhandled /* dabt */ 00026 b trap_hyp_entry /* hvc */ 00027 b trap_secure_unhandled /* irq */ 00028 b trap_secure_unhandled /* fiq*/ 00029 00030 /* Install hvbar, hyp vector, and return in Non-secure state */ 00031 trap_smc: 00032 mrc p15, 0, r10, c1, c1, 0 @ SCR -> r10 00033 bic r10, r10, #0x07f @ SCR.NS=1, IRQ,FIQ,EA=0, FW,AW=1, nET=0, SCD=1, HCE=1 00034 ldr r11, =0x1b1 00035 orr r10, r10, r11 00036 mcr p15, 0, r11, c1, c1, 0 00037 isb 00038 00039 @ Use monitor_secure_vectors as temporary Hyp exception vector for Hyp mode entrance 00040 ldr r11, =monitor_secure_vectors 00041 mcr p15, 4, r11, c12, c0, 0 00042 @ return in NS state 00043 movs pc, lr 00044 00045 trap_hyp_entry: 00046 /* Setup stack for Hyp for the first time */ 00047 ldr sp,=mon_stacklimit 00048 00049 /* Stay in Hyp mode and branch to where hvc invoked. */ 00050 mrs lr, elr_hyp 00051 mov pc, lr 00052 00053 trap_secure_unhandled: 00054 @ Push registers 00055 push {r0-r12} 00056 mrs r0, spsr_mon 00057 mov r1, #0 00058 push {r0, r1} 00059 00060 mov r0, sp 00061 /* Place holder in case we need to handle secure state exception */ 00062 /* bl _trap_secure_unhandled */ 00063 00064 @ Pop registers 00065 pop {r0-r1} 00066 msr spsr_mon, r0 00067 pop {r0-r12} 00068 eret 00069 00070 /* 00071 * Initialize vector and stack pointers for modes: Secure SVC, Non-secure SVC, and Hyp mode 00072 */ 00073 .global mon_init 00074 mon_init: 00075 push {r0-r2, lr} 00076 @ Setup Exception Vector 00077 ldr r1, =monitor_secure_vectors 00078 mcr p15, 0, r1, c12, c0, 1 @ Monitor vector base address 00079 00080 @ regular return 00081 pop {r0-r2, pc} 00082 00083 .type mon_init, %function 00084 00085 .global __mon_enter_hyp 00086 __mon_enter_hyp: 00087 smc #0 @ -> trap_smc 00088 hvc #0 @ -> trap_hyp_entry 00089 00090 /* Place the right Hyp exception vector for the first time */ 00091 ldr r0, =monitor_hyp_vectors 00092 mcr p15, 4, r0, c12, c0, 0 00093 00094 bl main 00095 00096 @ never come back 00097 1: b 1b 00098 00099 .type __mon_enter_hyp, %function