|
khypervisor
v1
|


Go to the source code of this file.
| #define VGIC_NUM_MAX_SLOTS 64 |
| #define VGIC_SLOT_NOTFOUND (0xFFFFFFFF) |
| enum virq_state_t |
Definition at line 9 of file vgic.h.
{
VIRQ_STATE_INACTIVE = 0x00,
VIRQ_STATE_PENDING = 0x01,
VIRQ_STATE_ACTIVE = 0x02,
VIRQ_STATE_PENDING_ACTIVE = 0x03,
} virq_state_t;
| hvmm_status_t vgic_enable | ( | uint8_t | enable | ) |
Definition at line 277 of file vgic.c.
{
hvmm_status_t result = HVMM_STATUS_BAD_ACCESS;
if ( VGIC_READY() ) {
if ( enable ) {
uint32_t hcr = _vgic.base[GICH_HCR];
hcr |= GICH_HCR_EN | GICH_HCR_NPIE;
_vgic.base[GICH_HCR] = hcr;
} else {
_vgic.base[GICH_HCR] &= ~(GICH_HCR_EN | GICH_HCR_NPIE);
}
result = HVMM_STATUS_SUCCESS;
}
return result;
}
| hvmm_status_t vgic_flush_virqs | ( | vmid_t | vmid | ) |
Definition at line 530 of file vgic.c.
{
hvmm_status_t result = HVMM_STATUS_IGNORED;
if ( _cb_virq_flush != 0 ) {
_cb_virq_flush(vmid);
result = HVMM_STATUS_SUCCESS;
}
return result;
}
| hvmm_status_t vgic_init | ( | void | ) |
Definition at line 451 of file vgic.c.
{
hvmm_status_t result = HVMM_STATUS_UNKNOWN_ERROR;
HVMM_TRACE_ENTER();
_vgic.base = gic_vgic_baseaddr();
_vgic.num_lr = (_vgic.base[GICH_VTR] & GICH_VTR_LISTREGS_MASK) + 1;
_vgic.valid_lr_mask = _vgic_valid_lr_mask( _vgic.num_lr );
_vgic.initialized = VGIC_SIGNATURE_INITIALIZED;
vgic_maintenance_irq_enable(1);
slotpirq_init();
result = HVMM_STATUS_SUCCESS;
_vgic_dump_status();
_vgic_dump_regs();
HVMM_TRACE_EXIT();
return result;
}

| hvmm_status_t vgic_init_status | ( | struct vgic_status * | status, |
| vmid_t | vmid | ||
| ) |
Definition at line 475 of file vgic.c.
{
hvmm_status_t result = HVMM_STATUS_SUCCESS;
int i;
status->hcr = 0;
status->apr = 0;
status->vmcr = 0;
status->saved_once = 0;
for( i = 0; i < _vgic.num_lr; i++) {
status->lr[i] = 0;
}
return result;
}
| uint32_t vgic_inject_virq | ( | uint32_t | virq, |
| uint32_t | slot, | ||
| virq_state_t | state, | ||
| uint32_t | priority, | ||
| uint8_t | hw, | ||
| uint32_t | physrc, | ||
| uint8_t | maintenance | ||
| ) |
Definition at line 332 of file vgic.c.
{
uint32_t physicalid;
uint32_t lr_desc;
HVMM_TRACE_ENTER();
physicalid = (hw ? physrc : (maintenance << 9) | (physrc & 0x7)) << GICH_LR_PHYSICALID_SHIFT;
physicalid &= GICH_LR_PHYSICALID_MASK;
lr_desc = (GICH_LR_HW_MASK & (hw << GICH_LR_HW_SHIFT) ) |
/* (GICH_LR_GRP1_MASK & (1 << GICH_LR_GRP1_SHIFT) )| */
(GICH_LR_STATE_MASK & (state << GICH_LR_STATE_SHIFT) ) |
(GICH_LR_PRIORITY_MASK & ( (priority >> 3) << GICH_LR_PRIORITY_SHIFT) ) |
physicalid |
(GICH_LR_VIRTUALID_MASK & virq );
slot = vgic_is_free_slot( slot );
HVMM_TRACE_HEX32("lr_desc:", lr_desc);
HVMM_TRACE_HEX32("free slot:", slot);
if ( slot != VGIC_SLOT_NOTFOUND ) {
_vgic.base[GICH_LR + slot] = lr_desc;
vgic_injection_enable(1);
vgic_enable(1);
}
_vgic_dump_regs();
HVMM_TRACE_EXIT();
return slot;
}

| uint32_t vgic_inject_virq_hw | ( | uint32_t | virq, |
| virq_state_t | state, | ||
| uint32_t | priority, | ||
| uint32_t | pirq | ||
| ) |
Definition at line 371 of file vgic.c.
{
uint32_t slot = VGIC_SLOT_NOTFOUND;
HVMM_TRACE_ENTER();
slot = vgic_find_free_slot();
HVMM_TRACE_HEX32("slot:", slot);
if ( slot != VGIC_SLOT_NOTFOUND ) {
#ifdef VGIC_SIMULATE_HWVIRQ
slot = vgic_inject_virq( virq, slot, state, priority, 0, 0, 1 );
#else
slot = vgic_inject_virq( virq, slot, state, priority, 1, pirq, 0 );
#endif
}
HVMM_TRACE_EXIT();
return slot;
}

| uint32_t vgic_inject_virq_sw | ( | uint32_t | virq, |
| virq_state_t | state, | ||
| uint32_t | priority, | ||
| uint32_t | cpuid, | ||
| uint8_t | maintenance | ||
| ) |
Definition at line 390 of file vgic.c.
{
uint32_t slot = VGIC_SLOT_NOTFOUND;
HVMM_TRACE_ENTER();
slot = vgic_find_free_slot();
HVMM_TRACE_HEX32("slot:", slot);
if ( slot != VGIC_SLOT_NOTFOUND ) {
slot = vgic_inject_virq( virq, slot, state, priority, 0, cpuid, maintenance );
}
HVMM_TRACE_EXIT();
return slot;
}

| hvmm_status_t vgic_restore_status | ( | struct vgic_status * | status, |
| vmid_t | vmid | ||
| ) |
Definition at line 509 of file vgic.c.
{
hvmm_status_t result = HVMM_STATUS_BAD_ACCESS;
int i;
for( i = 0; i < _vgic.num_lr; i++) {
_vgic.base[GICH_LR + i] = status->lr[i];
}
_vgic.base[GICH_APR] = status->apr;
_vgic.base[GICH_VMCR] = status->vmcr;
_vgic.base[GICH_HCR] = status->hcr;
/* Inject queued virqs to the next guest */
vgic_flush_virqs(vmid);
_vgic_dump_regs();
result = HVMM_STATUS_SUCCESS;
return result;
}

| hvmm_status_t vgic_save_status | ( | struct vgic_status * | status, |
| vmid_t | vmid | ||
| ) |
Definition at line 491 of file vgic.c.
{
hvmm_status_t result = HVMM_STATUS_SUCCESS;
int i;
for( i = 0; i < _vgic.num_lr; i++ ) {
status->lr[i] = _vgic.base[GICH_LR + i];
}
status->hcr = _vgic.base[GICH_HCR];
status->apr = _vgic.base[GICH_APR];
status->vmcr = _vgic.base[GICH_VMCR];
status->saved_once = VGIC_SIGNATURE_INITIALIZED;
vgic_enable(0);
return result;
}

| hvmm_status_t vgic_setcallback_virq_flush | ( | void(*)(vmid_t vmid) | callback | ) |
Definition at line 440 of file vgic.c.
{
_cb_virq_flush = callback;
if ( _cb_virq_flush == 0 ) {
printh( "vgic: virq_flush() cleared\n" );
} else {
printh( "vgic: virq_flush() set to function at %x\n", (uint32_t) _cb_virq_flush );
}
return HVMM_STATUS_SUCCESS;
}
1.7.6.1